Roger Chang has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70599?usp=email ) Change subject: arch-riscv: Simplify the rev8 and brev8 instructions ...................................................................... arch-riscv: Simplify the rev8 and brev8 instructions These mnemonic of instructions should not have 'rv32_' prefix Change-Id: Ic072ba8b84e5a51be060e5d7ca16dd913c318957 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/70599 Reviewed-by: Yu-hsin Wang <yuhsingw@google.com> Maintainer: Jason Lowe-Power <power.jg@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com> --- M src/arch/riscv/isa/decoder.isa 1 file changed, 18 insertions(+), 38 deletions(-) Approvals: Yu-hsin Wang: Looks good to me, approved kokoro: Regressions pass Jason Lowe-Power: Looks good to me, approved diff --git a/src/arch/riscv/isa/decoder.isa b/src/arch/riscv/isa/decoder.isa index 45e2946..ae2f0a4 100644 --- a/src/arch/riscv/isa/decoder.isa +++ b/src/arch/riscv/isa/decoder.isa @@ -667,44 +667,24 @@ | (Rs1 << ((xlen - imm) & (xlen - 1)))); }}, imm_type = uint64_t, imm_code = {{ imm = SHAMT6; }}); 0xd: decode RS2 { - 0x18: decode BIT25 { - 0x0: rv32_rev8({{ - uint32_t result = 0; - result |= - ((Rs1_uw & 0xffUL) << 24) - | (((Rs1_uw >> 24) & 0xffUL)); - result |= - (((Rs1_uw >> 8) & 0xffUL) << 16) - | (((Rs1_uw >> 16) & 0xffUL) << 8); - Rd = rvSext(result); - }}, - imm_type = uint64_t, imm_code = {{ imm = SHAMT5; }}); - 0x1: rev8({{ - uint64_t result = 0; - result |= - ((Rs1 & 0xffULL) << 56) - | (((Rs1 >> 56) & 0xffULL)); - result |= - (((Rs1 >> 8) & 0xffULL) << 48) - | (((Rs1 >> 48) & 0xffULL) << 8); - result |= - (((Rs1 >> 16) & 0xffULL) << 40) - | (((Rs1 >> 40) & 0xffULL) << 16); - result |= - (((Rs1 >> 24) & 0xffULL) << 32) - | (((Rs1 >> 32) & 0xffULL) << 24); - Rd = result; - }}, - imm_type = uint64_t, imm_code = {{ imm = SHAMT6; }}); - } - 0x07: decode RVTYPE { - 0x0: rv32_brev8({{ - Rd_sw = _rvk_emu_brev8_32(Rs1_sw); - }}, imm_code = {{ imm = SHAMT5; }}); - 0x1: brev8({{ - Rd = _rvk_emu_brev8_64(Rs1); - }}, imm_code = {{ imm = SHAMT6; }}); - } + 0x18: ROp::rev8({{ + if (rvSelect((bool)SHAMT6BIT5, false)) { + return std::make_shared<IllegalInstFault>( + "shmat[5] != 0", machInst); + } + if (machInst.rv_type == RV32) { + Rd_sd = _rvk_emu_grev_32(Rs1_sd, 0x18); + } else { + Rd_sd = _rvk_emu_grev_64(Rs1_sd, 0x38); + } + }}); + 0x07: ROp::brev8({{ + if (machInst.rv_type == RV32) { + Rd_sd = _rvk_emu_brev8_32(Rs1_sd); + } else { + Rd_sd = _rvk_emu_brev8_64(Rs1_sd); + } + }}); } } 0x6: ori({{ -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/70599?usp=email To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: Ic072ba8b84e5a51be060e5d7ca16dd913c318957 Gerrit-Change-Number: 70599 Gerrit-PatchSet: 4 Gerrit-Owner: Roger Chang <rogerycchang@google.com> Gerrit-Reviewer: Ayaz Akram <yazakram@ucdavis.edu> Gerrit-Reviewer: Hoa Nguyen <hoanguyen@ucdavis.edu> Gerrit-Reviewer: Jason Lowe-Power <jason@lowepower.com> Gerrit-Reviewer: Jason Lowe-Power <power.jg@gmail.com> Gerrit-Reviewer: Roger Chang <rogerycchang@google.com> Gerrit-Reviewer: Yu-hsin Wang <yuhsingw@google.com> Gerrit-Reviewer: kokoro <noreply+kokoro@google.com> Gerrit-CC: Bobby Bruce <bbruce@ucdavis.edu>