Hoa Nguyen has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/68857?usp=email ) Change subject: stdlib: Fix bug in MESI_Three_Level_Cache initialization ...................................................................... stdlib: Fix bug in MESI_Three_Level_Cache initialization Change-Id: I2d06c842955aa1868053a0d852fc523392480154 Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu> --- M src/python/gem5/components/cachehierarchies/ruby/caches/mesi_three_level/l1_cache.py M src/python/gem5/components/cachehierarchies/ruby/caches/mesi_three_level/l2_cache.py 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/python/gem5/components/cachehierarchies/ruby/caches/mesi_three_level/l1_cache.py b/src/python/gem5/components/cachehierarchies/ruby/caches/mesi_three_level/l1_cache.py index 9f47e41..b485481 100644 --- a/src/python/gem5/components/cachehierarchies/ruby/caches/mesi_three_level/l1_cache.py +++ b/src/python/gem5/components/cachehierarchies/ruby/caches/mesi_three_level/l1_cache.py @@ -68,14 +68,14 @@ self.Icache = RubyCache( size=l1i_size, assoc=l1i_assoc, - start_index_bit=self.getBlockSizeBits(cache_line_size.value), + start_index_bit=self.getBlockSizeBits(cache_line_size), is_icache=True, replacement_policy=LRURP(), ) self.Dcache = RubyCache( size=l1d_size, assoc=l1d_assoc, - start_index_bit=self.getBlockSizeBits(cache_line_size.value), + start_index_bit=self.getBlockSizeBits(cache_line_size), is_icache=False, replacement_policy=LRURP(), ) diff --git a/src/python/gem5/components/cachehierarchies/ruby/caches/mesi_three_level/l2_cache.py b/src/python/gem5/components/cachehierarchies/ruby/caches/mesi_three_level/l2_cache.py index d8c9659..d54e1ab 100644 --- a/src/python/gem5/components/cachehierarchies/ruby/caches/mesi_three_level/l2_cache.py +++ b/src/python/gem5/components/cachehierarchies/ruby/caches/mesi_three_level/l2_cache.py @@ -67,7 +67,7 @@ self.cache = RubyCache( size=l2_size, assoc=l2_assoc, - start_index_bit=self.getBlockSizeBits(cache_line_size.value), + start_index_bit=self.getBlockSizeBits(cache_line_size), is_icache=False, ) # l2_select_num_bits is ruby backend terminology. -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/68857?usp=email To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I2d06c842955aa1868053a0d852fc523392480154 Gerrit-Change-Number: 68857 Gerrit-PatchSet: 1 Gerrit-Owner: Hoa Nguyen <hoanguyen@ucdavis.edu> Gerrit-MessageType: newchange