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[S] Change in gem5/gem5[develop]: misc: Fix 'unused variable' clang errors with gem5.fast

BB
Bobby Bruce (Gerrit)
Mon, May 8, 2023 10:54 PM

Bobby Bruce has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/70297?usp=email )

Change subject: misc: Fix 'unused variable' clang errors with gem5.fast
......................................................................

misc: Fix 'unused variable' clang errors with gem5.fast

Change-Id: I2bb8ac10e8db69fa82abe41577cd8e5db575e93d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/70297
Maintainer: Bobby Bruce bbruce@ucdavis.edu
Tested-by: kokoro noreply+kokoro@google.com
Reviewed-by: Jason Lowe-Power power.jg@gmail.com
Reviewed-by: Daniel Carvalho odanrc@yahoo.com.br

M src/arch/arm/self_debug.cc
M src/arch/sparc/faults.cc
M src/cpu/activity.cc
M src/cpu/minor/execute.cc
M src/cpu/simple/atomic.cc
M src/dev/storage/ide_disk.cc
M src/mem/ruby/system/Sequencer.cc
7 files changed, 6 insertions(+), 22 deletions(-)

Approvals:
Bobby Bruce: Looks good to me, approved
Jason Lowe-Power: Looks good to me, approved
Daniel Carvalho: Looks good to me, approved
kokoro: Regressions pass

diff --git a/src/arch/arm/self_debug.cc b/src/arch/arm/self_debug.cc
index a4e685f..a99cf0a 100644
--- a/src/arch/arm/self_debug.cc
+++ b/src/arch/arm/self_debug.cc
@@ -127,9 +127,7 @@
return NoFault;

  ExceptionLevel el = (ExceptionLevel) currEL(tc);
  • int idxtmp = -1;
    for (auto &p: arWatchPoints){
  •    idxtmp ++;
        if (p.enable) {
            if (p.test(tc, vaddr, el, write, atomic, size)) {
                return triggerWatchpointException(tc, vaddr, write, cm);
    

diff --git a/src/arch/sparc/faults.cc b/src/arch/sparc/faults.cc
index ff80ec1..d3d5ae4 100644
--- a/src/arch/sparc/faults.cc
+++ b/src/arch/sparc/faults.cc
@@ -302,7 +302,6 @@
void
doREDFault(ThreadContext *tc, TrapType tt)
{

  • RegVal TL = tc->readMiscRegNoEffect(MISCREG_TL);
    RegVal TSTATE = tc->readMiscRegNoEffect(MISCREG_TSTATE);
    PSTATE pstate = tc->readMiscRegNoEffect(MISCREG_PSTATE);
    HPSTATE hpstate = tc->readMiscRegNoEffect(MISCREG_HPSTATE);
    @@ -313,8 +312,6 @@
    RegVal GL = tc->readMiscRegNoEffect(MISCREG_GL);
    auto &pc = tc->pcState().as<PCState>();

  • TL++;

  • Addr pcMask = pstate.am ? mask(32) : mask(64);
    
    // set TSTATE.gl to gl
    

diff --git a/src/cpu/activity.cc b/src/cpu/activity.cc
index f10b1ce..cae5932 100644
--- a/src/cpu/activity.cc
+++ b/src/cpu/activity.cc
@@ -151,6 +151,7 @@
void
ActivityRecorder::validate()
{
+#ifdef DEBUG
int count = 0;
for (int i = 0; i <= longestLatency; ++i) {
if (activityBuffer[-i]) {
@@ -165,6 +166,7 @@
}

  assert(count == activityCount);

+#endif
}

} // namespace gem5
diff --git a/src/cpu/minor/execute.cc b/src/cpu/minor/execute.cc
index 4e0fa42..ba4032e 100644
--- a/src/cpu/minor/execute.cc
+++ b/src/cpu/minor/execute.cc
@@ -568,10 +568,6 @@
/* Number of memory ops issues this cycle to check for
memoryIssueLimit */
unsigned num_mem_insts_issued = 0;

  • /* Number of instructions discarded this cycle in order to enforce a
  • *  discardLimit. @todo, add that parameter? */
    
  • unsigned num_insts_discarded = 0;
  • do {
        MinorDynInstPtr inst = insts_in->insts[thread.inputIndex];
        Fault fault = inst->fault;
    

@@ -800,9 +796,7 @@
if (issued_mem_ref)
num_mem_insts_issued++;

  •        if (discarded) {
    
  •            num_insts_discarded++;
    
  •        } else if (!inst->isBubble()) {
    
  •        if (!discarded && !inst->isBubble()) {
                num_insts_issued++;
    
                if (num_insts_issued == issueLimit)
    

diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 5c9fc29..2cbb62d 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -462,7 +462,7 @@
Addr frag_addr = addr;
int frag_size = 0;
int size_left = size;

  • int curr_frag_id = 0;
  • [[maybe_unused]] int curr_frag_id = 0;
    bool predicate;
    Fault fault = NoFault;

diff --git a/src/dev/storage/ide_disk.cc b/src/dev/storage/ide_disk.cc
index e43437f..cb3a58a 100644
--- a/src/dev/storage/ide_disk.cc
+++ b/src/dev/storage/ide_disk.cc
@@ -1072,7 +1072,7 @@
Tick reschedule = 0;
Events_t event = None;

  • int eventCount = 0;
  • [[maybe_unused]] int eventCount = 0;

    if (dmaTransferEvent.scheduled()) {
    reschedule = dmaTransferEvent.when();
    diff --git a/src/mem/ruby/system/Sequencer.cc
    b/src/mem/ruby/system/Sequencer.cc
    index 24439d6..3b75619 100644
    --- a/src/mem/ruby/system/Sequencer.cc
    +++ b/src/mem/ruby/system/Sequencer.cc
    @@ -464,8 +464,6 @@
    // ruby request was outstanding. Since only 1 ruby request was made,
    // profile the ruby latency once.
    bool ruby_request = true;

  • int aliased_stores = 0;
  • int aliased_loads = 0;
    while (!seq_req_list.empty()) {
    SequencerRequest &seq_req = seq_req_list.front();

@@ -520,9 +518,8 @@
recordMissLatency(&seq_req, success, mach, externalHit,
initialRequestTime, forwardRequestTime,
firstResponseTime);

  •        } else {
    
  •            aliased_stores++;
            }
    
  •         markRemoved();
            hitCallback(&seq_req, data, success, mach, externalHit,
                        initialRequestTime, forwardRequestTime,
    

@@ -532,7 +529,6 @@
// handle read request
assert(!ruby_request);
markRemoved();

  •        aliased_loads++;
            hitCallback(&seq_req, data, true, mach, externalHit,
                        initialRequestTime, forwardRequestTime,
                        firstResponseTime, !ruby_request);
    

@@ -565,15 +561,12 @@
// ruby request was outstanding. Since only 1 ruby request was made,
// profile the ruby latency once.
bool ruby_request = true;

  • int aliased_loads = 0;
    while (!seq_req_list.empty()) {
    SequencerRequest &seq_req = seq_req_list.front();
    if (ruby_request) {
    assert((seq_req.m_type == RubyRequestType_LD) ||
    (seq_req.m_type == RubyRequestType_Load_Linked) ||
    (seq_req.m_type == RubyRequestType_IFETCH));
  •    } else {
    
  •        aliased_loads++;
        }
        if ((seq_req.m_type != RubyRequestType_LD) &&
            (seq_req.m_type != RubyRequestType_Load_Linked) &&
    

--
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Gerrit-MessageType: merged
Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I2bb8ac10e8db69fa82abe41577cd8e5db575e93d
Gerrit-Change-Number: 70297
Gerrit-PatchSet: 6
Gerrit-Owner: Bobby Bruce bbruce@ucdavis.edu
Gerrit-Reviewer: Bobby Bruce bbruce@ucdavis.edu
Gerrit-Reviewer: Daniel Carvalho odanrc@yahoo.com.br
Gerrit-Reviewer: Gabe Black gabe.black@gmail.com
Gerrit-Reviewer: Jason Lowe-Power jason@lowepower.com
Gerrit-Reviewer: Jason Lowe-Power power.jg@gmail.com
Gerrit-Reviewer: Zhengrong Wang seanyukigeek@gmail.com
Gerrit-Reviewer: kokoro noreply+kokoro@google.com

Bobby Bruce has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/70297?usp=email ) Change subject: misc: Fix 'unused variable' clang errors with gem5.fast ...................................................................... misc: Fix 'unused variable' clang errors with gem5.fast Change-Id: I2bb8ac10e8db69fa82abe41577cd8e5db575e93d Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/70297 Maintainer: Bobby Bruce <bbruce@ucdavis.edu> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Jason Lowe-Power <power.jg@gmail.com> Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> --- M src/arch/arm/self_debug.cc M src/arch/sparc/faults.cc M src/cpu/activity.cc M src/cpu/minor/execute.cc M src/cpu/simple/atomic.cc M src/dev/storage/ide_disk.cc M src/mem/ruby/system/Sequencer.cc 7 files changed, 6 insertions(+), 22 deletions(-) Approvals: Bobby Bruce: Looks good to me, approved Jason Lowe-Power: Looks good to me, approved Daniel Carvalho: Looks good to me, approved kokoro: Regressions pass diff --git a/src/arch/arm/self_debug.cc b/src/arch/arm/self_debug.cc index a4e685f..a99cf0a 100644 --- a/src/arch/arm/self_debug.cc +++ b/src/arch/arm/self_debug.cc @@ -127,9 +127,7 @@ return NoFault; ExceptionLevel el = (ExceptionLevel) currEL(tc); - int idxtmp = -1; for (auto &p: arWatchPoints){ - idxtmp ++; if (p.enable) { if (p.test(tc, vaddr, el, write, atomic, size)) { return triggerWatchpointException(tc, vaddr, write, cm); diff --git a/src/arch/sparc/faults.cc b/src/arch/sparc/faults.cc index ff80ec1..d3d5ae4 100644 --- a/src/arch/sparc/faults.cc +++ b/src/arch/sparc/faults.cc @@ -302,7 +302,6 @@ void doREDFault(ThreadContext *tc, TrapType tt) { - RegVal TL = tc->readMiscRegNoEffect(MISCREG_TL); RegVal TSTATE = tc->readMiscRegNoEffect(MISCREG_TSTATE); PSTATE pstate = tc->readMiscRegNoEffect(MISCREG_PSTATE); HPSTATE hpstate = tc->readMiscRegNoEffect(MISCREG_HPSTATE); @@ -313,8 +312,6 @@ RegVal GL = tc->readMiscRegNoEffect(MISCREG_GL); auto &pc = tc->pcState().as<PCState>(); - TL++; - Addr pcMask = pstate.am ? mask(32) : mask(64); // set TSTATE.gl to gl diff --git a/src/cpu/activity.cc b/src/cpu/activity.cc index f10b1ce..cae5932 100644 --- a/src/cpu/activity.cc +++ b/src/cpu/activity.cc @@ -151,6 +151,7 @@ void ActivityRecorder::validate() { +#ifdef DEBUG int count = 0; for (int i = 0; i <= longestLatency; ++i) { if (activityBuffer[-i]) { @@ -165,6 +166,7 @@ } assert(count == activityCount); +#endif } } // namespace gem5 diff --git a/src/cpu/minor/execute.cc b/src/cpu/minor/execute.cc index 4e0fa42..ba4032e 100644 --- a/src/cpu/minor/execute.cc +++ b/src/cpu/minor/execute.cc @@ -568,10 +568,6 @@ /* Number of memory ops issues this cycle to check for memoryIssueLimit */ unsigned num_mem_insts_issued = 0; - /* Number of instructions discarded this cycle in order to enforce a - * discardLimit. @todo, add that parameter? */ - unsigned num_insts_discarded = 0; - do { MinorDynInstPtr inst = insts_in->insts[thread.inputIndex]; Fault fault = inst->fault; @@ -800,9 +796,7 @@ if (issued_mem_ref) num_mem_insts_issued++; - if (discarded) { - num_insts_discarded++; - } else if (!inst->isBubble()) { + if (!discarded && !inst->isBubble()) { num_insts_issued++; if (num_insts_issued == issueLimit) diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index 5c9fc29..2cbb62d 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -462,7 +462,7 @@ Addr frag_addr = addr; int frag_size = 0; int size_left = size; - int curr_frag_id = 0; + [[maybe_unused]] int curr_frag_id = 0; bool predicate; Fault fault = NoFault; diff --git a/src/dev/storage/ide_disk.cc b/src/dev/storage/ide_disk.cc index e43437f..cb3a58a 100644 --- a/src/dev/storage/ide_disk.cc +++ b/src/dev/storage/ide_disk.cc @@ -1072,7 +1072,7 @@ Tick reschedule = 0; Events_t event = None; - int eventCount = 0; + [[maybe_unused]] int eventCount = 0; if (dmaTransferEvent.scheduled()) { reschedule = dmaTransferEvent.when(); diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc index 24439d6..3b75619 100644 --- a/src/mem/ruby/system/Sequencer.cc +++ b/src/mem/ruby/system/Sequencer.cc @@ -464,8 +464,6 @@ // ruby request was outstanding. Since only 1 ruby request was made, // profile the ruby latency once. bool ruby_request = true; - int aliased_stores = 0; - int aliased_loads = 0; while (!seq_req_list.empty()) { SequencerRequest &seq_req = seq_req_list.front(); @@ -520,9 +518,8 @@ recordMissLatency(&seq_req, success, mach, externalHit, initialRequestTime, forwardRequestTime, firstResponseTime); - } else { - aliased_stores++; } + markRemoved(); hitCallback(&seq_req, data, success, mach, externalHit, initialRequestTime, forwardRequestTime, @@ -532,7 +529,6 @@ // handle read request assert(!ruby_request); markRemoved(); - aliased_loads++; hitCallback(&seq_req, data, true, mach, externalHit, initialRequestTime, forwardRequestTime, firstResponseTime, !ruby_request); @@ -565,15 +561,12 @@ // ruby request was outstanding. Since only 1 ruby request was made, // profile the ruby latency once. bool ruby_request = true; - int aliased_loads = 0; while (!seq_req_list.empty()) { SequencerRequest &seq_req = seq_req_list.front(); if (ruby_request) { assert((seq_req.m_type == RubyRequestType_LD) || (seq_req.m_type == RubyRequestType_Load_Linked) || (seq_req.m_type == RubyRequestType_IFETCH)); - } else { - aliased_loads++; } if ((seq_req.m_type != RubyRequestType_LD) && (seq_req.m_type != RubyRequestType_Load_Linked) && -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/70297?usp=email To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I2bb8ac10e8db69fa82abe41577cd8e5db575e93d Gerrit-Change-Number: 70297 Gerrit-PatchSet: 6 Gerrit-Owner: Bobby Bruce <bbruce@ucdavis.edu> Gerrit-Reviewer: Bobby Bruce <bbruce@ucdavis.edu> Gerrit-Reviewer: Daniel Carvalho <odanrc@yahoo.com.br> Gerrit-Reviewer: Gabe Black <gabe.black@gmail.com> Gerrit-Reviewer: Jason Lowe-Power <jason@lowepower.com> Gerrit-Reviewer: Jason Lowe-Power <power.jg@gmail.com> Gerrit-Reviewer: Zhengrong Wang <seanyukigeek@gmail.com> Gerrit-Reviewer: kokoro <noreply+kokoro@google.com>