Marco Chen has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/69318?usp=email ) Change subject: arch-arm: This commit fix incorrect ARM isa implementation ...................................................................... arch-arm: This commit fix incorrect ARM isa implementation When running 500.perlbench_r of specint 2017, the system will raise an assertion error. For function bits of src/base/bitfield.hh (line 76), the parameter First is smaller than Last. This is caused by incorrect implementation of uqrshl in src/arch/arm/isa/insts/neon64.isa When shiftAmt equals 0, which mean uqrshl is actually not shift the value stored in register. sizeof(Element) * 8 - 1 will be smaller than sizeof(Element) * 8 - shiftAmt, thus will raise the assertion error. This commit added this special condition. No Jira issue has been submitted to report this error Change-Id: I4162ac3ddb62f162619db400f214f33209b23c19 --- M src/arch/arm/isa/insts/neon64.isa 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/arch/arm/isa/insts/neon64.isa b/src/arch/arm/isa/insts/neon64.isa index d867907..e0083c9 100644 --- a/src/arch/arm/isa/insts/neon64.isa +++ b/src/arch/arm/isa/insts/neon64.isa @@ -3255,8 +3255,9 @@ destElem = 0; } } else { - if (bits(srcElem1, sizeof(Element) * 8 - 1, - sizeof(Element) * 8 - shiftAmt)) { + if (shiftAmt != 0 && + bits(srcElem1, sizeof(Element) * 8 - 1, + sizeof(Element) * 8 - shiftAmt)) { destElem = mask(sizeof(Element) * 8); fpscr.qc = 1; } else { -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/69318?usp=email To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I4162ac3ddb62f162619db400f214f33209b23c19 Gerrit-Change-Number: 69318 Gerrit-PatchSet: 1 Gerrit-Owner: Marco Chen <mc@soc.pub> Gerrit-MessageType: newchange