To further specify it:
I am using the x86 architecture and already found the macroop in "/src/arch/x86/isa/insts/general_purpose/data_transfer/move.py". Is it possible to get the value of a variable in "src/cpu/o3/iew.cc" to use it during the instruction?
Gesendet: Donnerstag, 5. Dezember 2024 um 12:10
Von: "Reverent Green via gem5-users" <gem5-users@gem5.org>
An: gem5-users@gem5.org
CC: "Reverent Green" <reverent.green@web.de>
Betreff: [gem5-users] Modify MOVZX_B_R_M instruction
Hello everyone,
I'd like to modify the MOVZX_B_R_M instruction (more precisely the "zexti" part of it) in gem5.
In the first part of the instruction, a register address is loaded. After that the the destination register is set to the specific value (Setting int register 78 to 0x53).
My goal is to modify this instruction s.t. the value is first logical AND with another value. Up until now, unfortunately I could not find the exact spot in the code base where I can modify this specific instruction. Can somebody give me a hint?
As a follow up question, is it possible to access other bits/values from this point (e.g. page table bits or custom variables in the C code).
Help would be really appreciated and thank you for your answers.
Kind regards
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