Simple Switchable Processor with checkpoint restoration
Hello gem5 users,
I was having some trouble trying to restore a simulation from a checkpoint when using a stdlib switchable processor (SimpleSwitchableProcessor).
When I would attempt to run a simulation like this the simulation would freeze up and not restore the checkpoint at all.
I was wondering whether this functionality had been implemented yet or whether there was another way to achieve this using by adding to one of the processor or configuration scripts.
The only difference I could find between SwitchableProcessor and SimpleProcessor (which restored checkpoints fine) was that the former inherits directly from AbstractProcessor and the latter inherits from BaseCPUProcessor so I thought some functionality may have been added to BaseCPUProcessor which wasn’t available in AbstractProcessor alone.
Thank you for any help! 😊
Kind Regards,
Abdal
Hi Abdal,
Assuming that you run into this problem when using different start and
switch core types for SimpleSwitchable processor in your script, I think
the main problem is that on restore the start core type is not the same as
the core with which you took the checkpoint (which I am assuming was the
switch core type, let me know if that is not the case). I think you can
restore your checkpoint using SimpleProcessor as well. However, in that
case if you want to switch again after restoring you would not be able to
do so. Another solution/option is to create a new class that inherits from
SimpleSwitchableProcessor in which you just swap the start and switch keys,
for example some thing like following:
self._start_key = "switch"
self._switch_key = "start"
And then use this new processor type in your restore script. This way
you will restore with the correct CPU type and if you want to switch
to a different CPU type you can do that as well.
-Ayaz
On Mon, Jun 19, 2023 at 11:45 AM AbdelQader AlKilany via gem5-users <
gem5-users@gem5.org> wrote:
Hello gem5 users,
I was having some trouble trying to restore a simulation from a checkpoint
when using a stdlib switchable processor (SimpleSwitchableProcessor).
When I would attempt to run a simulation like this the simulation would
freeze up and not restore the checkpoint at all.
I was wondering whether this functionality had been implemented yet or
whether there was another way to achieve this using by adding to one of the
processor or configuration scripts.
The only difference I could find between SwitchableProcessor and
SimpleProcessor (which restored checkpoints fine) was that the former
inherits directly from AbstractProcessor and the latter inherits from
BaseCPUProcessor so I thought some functionality may have been added to
BaseCPUProcessor which wasn’t available in AbstractProcessor alone.
Thank you for any help! 😊
Kind Regards,
Abdal
gem5-users mailing list -- gem5-users@gem5.org
To unsubscribe send an email to gem5-users-leave@gem5.org
Hello Ayaz,
Thank you for your response! 😊
I am trying to checkpoint with Atomic then restore to atomic and switch to Timing/O3.
Your advice works if I checkpoint with this and also with Timing, then restore with Timing and switch, thank you.
From my knowledge the way to switch CPUs in stdlib is to use m5 exit, and to override the exit event with a cpu switch.
Or to do the same from a bootscript.
Is there a way to delay the switch in gem5 so that its not immediately after a boot (when I checkpoint).
I have tried:
"m5 checkpoint; m5 exit [10000000000]; "
To delay exit event by 10000000000 cycles. (also have tried without square brackets).
But this returns that my usage of m5 commands is incorrect.
Also I assume switching multiple times between different CPUs will require a new script based off of SimpleSwitchableProcessor
Kind regards,
Abdal
From: Ayaz Akram yazakram@ucdavis.edu
Sent: Tuesday, June 20, 2023 8:11 PM
To: The gem5 Users mailing list gem5-users@gem5.org
Cc: AbdelQader AlKilany abdelqader.alkilany@huawei.com
Subject: Re: [gem5-users] Simple Switchable Processor with checkpoint restoration
Hi Abdal,
Assuming that you run into this problem when using different start and switch core types for SimpleSwitchable processor in your script, I think the main problem is that on restore the start core type is not the same as the core with which you took the checkpoint (which I am assuming was the switch core type, let me know if that is not the case). I think you can restore your checkpoint using SimpleProcessor as well. However, in that case if you want to switch again after restoring you would not be able to do so. Another solution/option is to create a new class that inherits from SimpleSwitchableProcessor in which you just swap the start and switch keys, for example some thing like following:
self._start_key = "switch"
self._switch_key = "start"
And then use this new processor type in your restore script. This way you will restore with the correct CPU type and if you want to switch to a different CPU type you can do that as well.
-Ayaz
On Mon, Jun 19, 2023 at 11:45 AM AbdelQader AlKilany via gem5-users <gem5-users@gem5.orgmailto:gem5-users@gem5.org> wrote:
Hello gem5 users,
I was having some trouble trying to restore a simulation from a checkpoint when using a stdlib switchable processor (SimpleSwitchableProcessor).
When I would attempt to run a simulation like this the simulation would freeze up and not restore the checkpoint at all.
I was wondering whether this functionality had been implemented yet or whether there was another way to achieve this using by adding to one of the processor or configuration scripts.
The only difference I could find between SwitchableProcessor and SimpleProcessor (which restored checkpoints fine) was that the former inherits directly from AbstractProcessor and the latter inherits from BaseCPUProcessor so I thought some functionality may have been added to BaseCPUProcessor which wasn’t available in AbstractProcessor alone.
Thank you for any help! 😊
Kind Regards,
Abdal
gem5-users mailing list -- gem5-users@gem5.orgmailto:gem5-users@gem5.org
To unsubscribe send an email to gem5-users-leave@gem5.orgmailto:gem5-users-leave@gem5.org