Roger Chang has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/66191?usp=email ) Change subject: arch-riscv: seperate RV32 and RV64 Zk extensions ...................................................................... arch-riscv: seperate RV32 and RV64 Zk extensions 1. If the instruction is RV64 only, such as zknd(aes64ds, aes64dsm, aes64im, aes64ks1i, and aes64ks2), zkne(aes64es, aes64esm, aes64ks1i, aes64ks2), Zknh(sha512sig0, sha512sig1, sha512sum0, sha512sum1). The decoder should check rv_type before returning the instruction. 2. For the Zbkx(xperm8 and xperm4), I seperate them with RV32 and RV64 respectively, since the xperm function has individual implement for handling different size of integer. 3. Add the brev8(zbkb) instruction Change-Id: Id0b7ab2772fd1b21c1ee41075df44a5b6dbe5b47 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/66191 Reviewed-by: Hoa Nguyen <hoanguyen@ucdavis.edu> Reviewed-by: Jason Lowe-Power <power.jg@gmail.com> Maintainer: Jason Lowe-Power <power.jg@gmail.com> Tested-by: kokoro <noreply+kokoro@google.com> --- M src/arch/riscv/isa/decoder.isa 1 file changed, 82 insertions(+), 42 deletions(-) Approvals: kokoro: Regressions pass Jason Lowe-Power: Looks good to me, but someone else must approve; Looks good to me, approved Hoa Nguyen: Looks good to me, approved diff --git a/src/arch/riscv/isa/decoder.isa b/src/arch/riscv/isa/decoder.isa index 58958bb..cb2b199 100644 --- a/src/arch/riscv/isa/decoder.isa +++ b/src/arch/riscv/isa/decoder.isa @@ -537,18 +537,26 @@ 0x3: sha256sig1({{ Rd_sw = _rvk_emu_sha256sig1(Rs1_sw); }}); - 0x4: sha512sum0({{ - Rd_sd = _rvk_emu_sha512sum0(Rs1_sd); - }}); - 0x5: sha512sum1({{ - Rd_sd = _rvk_emu_sha512sum1(Rs1_sd); - }}); - 0x6: sha512sig0({{ - Rd_sd = _rvk_emu_sha512sig0(Rs1_sd); - }}); - 0x7: sha512sig1({{ - Rd_sd = _rvk_emu_sha512sig1(Rs1_sd); - }}); + 0x4: decode RVTYPE { + 0x1: sha512sum0({{ + Rd_sd = _rvk_emu_sha512sum0(Rs1_sd); + }}); + } + 0x5: decode RVTYPE { + 0x1: sha512sum1({{ + Rd_sd = _rvk_emu_sha512sum1(Rs1_sd); + }}); + } + 0x6: decode RVTYPE { + 0x1: sha512sig0({{ + Rd_sd = _rvk_emu_sha512sig0(Rs1_sd); + }}); + } + 0x7: decode RVTYPE { + 0x1: sha512sig1({{ + Rd_sd = _rvk_emu_sha512sig1(Rs1_sd); + }}); + } 0x8: sm3p0({{ Rd_sw = _rvk_emu_sm3p0(Rs1_sw); }}); @@ -565,12 +573,16 @@ Rd = rvSext(Rs1 | (UINT64_C(1) << index)); }}, imm_type = uint64_t, imm_code = {{ imm = SHAMT6; }}); 0x06: decode BIT24 { - 0x0: aes64im({{ - Rd_sd = _rvk_emu_aes64im(Rs1_sd); - }}); - 0x1: aes64ks1i({{ - Rd_sd = _rvk_emu_aes64ks1i(Rs1_sd, imm); - }}, imm_type = int32_t, imm_code={{ imm = RNUM; }}); + 0x0: decode RVTYPE { + 0x1: aes64im({{ + Rd_sd = _rvk_emu_aes64im(Rs1_sd); + }}); + } + 0x1: decode RVTYPE { + 0x1: aes64ks1i({{ + Rd_sd = _rvk_emu_aes64ks1i(Rs1_sd, imm); + }}, imm_type = int32_t, imm_code={{ imm = RNUM; }}); + } } 0x09: bclri({{ if (rvSelect((bool)SHAMT6BIT5, false)) { @@ -698,6 +710,14 @@ }}, imm_type = uint64_t, imm_code = {{ imm = SHAMT6; }}); } + 0x07: decode RVTYPE { + 0x0: rv32_brev8({{ + Rd_sw = _rvk_emu_brev8_32(Rs1_sw); + }}, imm_code = {{ imm = SHAMT5; }}); + 0x1: brev8({{ + Rd = _rvk_emu_brev8_64(Rs1); + }}, imm_code = {{ imm = SHAMT6; }}); + } } } 0x6: ori({{ @@ -972,33 +992,43 @@ }}, IntMultOp); } 0x18: sm4ed({{ - Rd_sd = _rvk_emu_sm4ed(Rs1_sd, Rs2_sd, (uint8_t)BS); + Rd_sw = _rvk_emu_sm4ed(Rs1_sw, Rs2_sw, (uint8_t)BS); }}); 0x19: decode BS { - 0x0: aes64es({{ - Rd_sd = _rvk_emu_aes64es(Rs1_sd, Rs2_sd); - }}); + 0x0: decode RVTYPE { + 0x1: aes64es({{ + Rd_sd = _rvk_emu_aes64es(Rs1_sd, Rs2_sd); + }}); + } } 0x1a: sm4ks({{ - Rd_sd = _rvk_emu_sm4ks(Rs1_sd, Rs2_sd, (uint8_t)BS); + Rd_sw = _rvk_emu_sm4ks(Rs1_sw, Rs2_sw, (uint8_t)BS); }}); 0x1b: decode BS { - 0x0: aes64esm({{ - Rd_sd = _rvk_emu_aes64esm(Rs1_sd, Rs2_sd); - }}); + 0x0: decode RVTYPE { + 0x1: aes64esm({{ + Rd_sd = _rvk_emu_aes64esm(Rs1_sd, Rs2_sd); + }}); + } } 0x1d: decode BS { - 0x0: aes64ds({{ - Rd_sd = _rvk_emu_aes64ds(Rs1_sd, Rs2_sd); - }}); + 0x0: decode RVTYPE { + 0x1: aes64ds({{ + Rd_sd = _rvk_emu_aes64ds(Rs1_sd, Rs2_sd); + }}); + } } - 0x1f: decode BS{ - 0x0: aes64dsm({{ - Rd_sd = _rvk_emu_aes64dsm(Rs1_sd, Rs2_sd); - }}); - 0x1: aes64ks2({{ - Rd_sd = _rvk_emu_aes64ks2(Rs1_sd, Rs2_sd); - }}); + 0x1f: decode BS { + 0x0: decode RVTYPE { + 0x1: aes64dsm({{ + Rd_sd = _rvk_emu_aes64dsm(Rs1_sd, Rs2_sd); + }}); + } + 0x1: decode RVTYPE { + 0x1: aes64ks2({{ + Rd_sd = _rvk_emu_aes64ks2(Rs1_sd, Rs2_sd); + }}); + } } } 0x1: decode FUNCT7 { @@ -1105,9 +1135,14 @@ 0x10: sh1add({{ Rd = rvSext((Rs1 << 1) + Rs2); }}); - 0x14: xperm4({{ - Rd_sd = _rvk_emu_xperm4_64(Rs1_sd, Rs2_sd); - }}); + 0x14: decode RVTYPE { + 0x0: xperm4_32({{ + Rd_sw = _rvk_emu_xperm4_32(Rs1_sw, Rs2_sw); + }}); + 0x1: xperm4_64({{ + Rd_sd = _rvk_emu_xperm4_64(Rs1_sd, Rs2_sd); + }}); + } } 0x3: decode FUNCT7 { 0x0: sltu({{ @@ -1186,9 +1221,14 @@ 0x10: sh2add({{ Rd = rvSext((Rs1 << 2) + Rs2); }}); - 0x14: xperm8({{ - Rd_sd = _rvk_emu_xperm8_64(Rs1_sd, Rs2_sd); - }}); + 0x14: decode RVTYPE { + 0x0: xperm8_32({{ + Rd_sw = _rvk_emu_xperm8_32(Rs1_sw, Rs2_sw); + }}); + 0x1: xperm8_64({{ + Rd_sd = _rvk_emu_xperm8_64(Rs1_sd, Rs2_sd); + }}); + } 0x20: xnor({{ Rd = rvSext(~(Rs1 ^ Rs2)); }}); -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/66191?usp=email To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-MessageType: merged Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: Id0b7ab2772fd1b21c1ee41075df44a5b6dbe5b47 Gerrit-Change-Number: 66191 Gerrit-PatchSet: 9 Gerrit-Owner: Roger Chang <rogerycchang@google.com> Gerrit-Reviewer: Ayaz Akram <yazakram@ucdavis.edu> Gerrit-Reviewer: Hoa Nguyen <hoanguyen@ucdavis.edu> Gerrit-Reviewer: Jason Lowe-Power <power.jg@gmail.com> Gerrit-Reviewer: Roger Chang <rogerycchang@google.com> Gerrit-Reviewer: kokoro <noreply+kokoro@google.com> Gerrit-CC: Yu-hsin Wang <yuhsingw@google.com>