Hello,

As the title says, I am trying to run the SPEC benchmarks (v1.1.9) on gem5
v23.0.1.0 on an Ubuntu 20.04 LTS host machine with SE mode of simulation on
DerivO3CPU. Whenever I run the simulation, I keep getting a similar error
for all Intrate benchmarks (base version) saying that unrecognized/invalid
instruction executed. I have compiled gem5 for the X86 ISA.

For SPEC, I have compiled the intrate benchmarks with the default
Example-gcc-linux-x86.cfg file. I also tried adding flags that would
disable BMI2 instructions since I saw in a previous question asked by a
gem5 user that gem5 may not support those instructions.

I am also aware that it is better to run SPEC in FS mode but that would be
in case of encountering unimplemented syscalls. I still want to understand
the reason and find a solution to avoid encountering the unimplemented
instruction error.

I appreciate any help you can provide.

Thank you. Best,
Preet.

TL;DR:
Simulation config:
--cpu-type=DerivO3CPU --cpu-clock=2GHz --caches --l2cache --l1d_size=64kB
--l1d_assoc=8 --l1i_size=32kB --l1i_assoc=8 --l2_size=2MB
--mem-type=DDR4_2400_8x8 --mem-size=8GB

Executable command:
SPEC2017 benchmarks

Simulation config:
deprecated/example/se.py

Host system:
Ubuntu 20.04 LTS, Intel Xeon Gold 5118, x86_64.

SPEC compilation config:
Example-gcc-linux-x86.cfg (also tried -mno-bmi2, -mtune=generic, -static,
but all failed).

Sample errors:
gcc_r_base gem5:
src/arch/x86/faults.cc:131: panic: Unrecognized/invalid instruction
executed:

 {
      leg = 0,
      rex = 0,
      vex/xop = 0,
      op = {
           type = one byte,
           op = 0x62,
           },
      modRM = 0xf2,
      sib = 0,
      immediate = 0,
      displacement = 0
      dispSize = 0}

perlbench_r_base gem5:
src/arch/x86/faults.cc:131: panic: Unrecognized/invalid instruction
executed:

 {
      leg = 0,
      rex = 0,
      vex/xop = 0,
      op = {
           type = one byte,
           op = 0x62,
           },
      modRM = 0xf2,
      sib = 0,
      immediate = 0,
      displacement = 0
      dispSize = 0}

mcf_r_base gem5:
src/arch/x86/faults.cc:166: panic: Tried to read unmapped address
0x347ffff7a3ca48.
PC: (0x2146=>0x214a).(0=>1), Instr:  MOV_R_M : ld  rdx, DS:[rax +
0x38]

omnettp_r_base gem5:
src/arch/x86/faults.cc:131: panic: Unrecognized/invalid instruction
executed:

 {
      leg = 0,
      rex = 0,
      vex/xop = 0,
      op = {
           type = one byte,
           op = 0x62,
           },
      modRM = 0xf2,
      sib = 0,
      immediate = 0,
      displacement = 0
      dispSize = 0}

xalancbmk_r_base gem5:
src/arch/x86/faults.cc:131: panic: Unrecognized/invalid instruction
executed:

 {
      leg = 0,
      rex = 0,
      vex/xop = 0,
      op = {
           type = one byte,
           op = 0x62,
           },
      modRM = 0xd1,
      sib = 0,
      immediate = 0,
      displacement = 0
      dispSize = 0}

x264_r_base gem5:
src/arch/x86/faults.cc:131: panic: Unrecognized/invalid instruction
executed:

 {
      leg = 0x10,
      rex = 0,
      vex/xop = 0x1,
      op = {
           type = three byte 0f38,
           op = 0xf7,
           },
      modRM = 0,
      sib = 0,
      immediate = 0,
      displacement = 0
      dispSize = 0}

deepsjeng_r_base gem5:
src/arch/x86/faults.cc:131: panic: Unrecognized/invalid instruction
executed:

 {
      leg = 0x10,
      rex = 0x8,
      vex/xop = 0x1,
      op = {
           type = three byte 0f38,
           op = 0xf7,
           },
      modRM = 0,
      sib = 0,
      immediate = 0,
      displacement = 0
      dispSize = 0}

leela_r_base gem5:
src/arch/x86/faults.cc:131: panic: Unrecognized/invalid instruction
executed:

 {
      leg = 0,
      rex = 0,
      vex/xop = 0,
      op = {
           type = one byte,
           op = 0x62,
           },
      modRM = 0xd1,
      sib = 0,
      immediate = 0,
      displacement = 0
      dispSize = 0}

exchange2_r_base gem5:
src/arch/x86/faults.cc:131: panic: Unrecognized/invalid instruction
executed:

 {
      leg = 0x10,
      rex = 0,
      vex/xop = 0x5,
      op = {
           type = three byte 0f3a,
           op = 0x38,
           },
      modRM = 0,
      sib = 0,
      immediate = 0,
      displacement = 0
      dispSize = 0}

xz_r_base gem5:
src/arch/x86/faults.cc:131: panic: Unrecognized/invalid instruction
executed:

 {
      leg = 0,
      rex = 0,
      vex/xop = 0,
      op = {
           type = one byte,
           op = 0x62,
           },
      modRM = 0xf2,
      sib = 0,
      immediate = 0,
      displacement = 0
      dispSize = 0}

I think this is an annoying comment to here, but it means there’s an an instruction it doesn’t know how to process. In SE mode the error handling is very unhelpful in telling you what that instruction actually is. I’m almost certain in this case your compilation is including some ISA extension we don’t support. I’d strongly advise trying to use FS mode as you’ll get better error handling there.

In addition, i’d strongly recommend using the stdlib to do this kind of work. An example of using SPEC 2017 in FS mode with the stdlib can be found here: configs/example/gem5_library/x86-spec-cpu2017-benchmarks.py. The scripts you are using are deprecated and will be removed in a future release of gem5.